WhizniumDBE extends the principles of automated code generation and iteration as proven by WhizniumSBE to the world of programmable logic (FPGA) register transfer level (RTL) projects.
Devices supported by WhizniumDBE include Xilinx‘s FPGA‘s and AP SoC‘s. A number of relevant use cases are available online, ranging from low-end / legacy Spartan3E and Artix7 systems to high-end latest-generation Kintex7 and Zynq boards.
WhizniumDBE helps modularize FPGA‘s into virtual controllers with functionality-specific command sets. Code generation covers both the host in terms of a C++ access library and the FPGA‘s VHDL code down to state-machine level. A second focus besides command execution are bulk data transfers.
The developer can choose between “easy“ and “full“ implementations, the former being especially lightweight on FPGA resources, the latter permitting non-blocking command execution and cascaded board hierarchies.
Deployment options for WhizniumDBE include an on-premise container-based solution, or cloud-based / pay-per-use as an alternative.
The development workflow is illustrated below: starting from scratch, “zeroth-order” model files suffice to generate a first synthesize-ready source code tree. This initiates the WhizniumDBE development cycle: it consists of manually editing the source code tree, adapting the model files, and feeding updated versions of both into WhizniumDBE, which in turn establishes the next iteration of the project.
Our four-page .pdf WhizniumDBE factsheet and an actual installation of WhizniumDBE in the aws cloud provide more information: